Project ForgeA partial data path of a processor is given in the figure, where RA, RB, and RZ are 32-bit registers. Mux_A selects between RA and an immediate value to feed one ALU input; Mux_B selects between RB and an immediate value to feed the other ALU input; the ALU output feeds RZ. Which option(s) is/are CORRECT related to arithmetic operations using the data path as shown?
- The data path can implement arithmetic operations involving two registers.
- The data path can implement arithmetic operations involving one register and one immediate value.
- The data path can implement arithmetic operations involving two immediate values.
- DThe data path can only implement arithmetic operations involving one register and one immediate value.
Explanation
Since Mux_A and Mux_B each independently choose between a register and an immediate value, all combinations are reachable: both muxes pick their register (two registers, A true), one picks a register and the other an immediate (B true), or both pick their immediate value (C true). Since more than one combination is possible, D's claim of an exclusive "only" case is false.
Source: GATE CS 2025 (Session 1 / CS1) (2025)
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