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Computer Organization & Architecture
Memory Hierarchy & Floating Point
GATE 2025
Hard

A computer has a memory hierarchy consisting of two-level cache (L1 and L2) and a main memory. If the processor needs to access data from memory, it first looks into L1 cache. If the data is not found in L1 cache, it goes to L2 cache. If it fails to get the data from L2 cache, it goes to main memory, where the data is definitely available. L1 cache: hit rate=95%, access time=10 ns. L2 cache: hit rate=85%, access time (including L1 cache miss penalty)=20 ns. Main memory: access time (including L1 and L2 cache miss penalty)=200 ns. The average memory access time in nanoseconds (rounded off to two decimal places) is ____.

11.85 ns(± 0.1 accepted)

Explanation

AMAT = P(L1 hit)×L1_time + P(L1 miss)×[P(L2 hit)×L2_time + P(L2 miss)×Mem_time] = 0.95×10 + 0.05×(0.85×20 + 0.15×200) = 9.5 + 0.05×(17+30) = 9.5 + 2.35 = 11.85 ns.

Source: GATE CS 2025 (Session 1 / CS1) (2025)

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