Project ForgeComputer Organization & Architecture
Pipelining & Instruction Sets
GATE 2014
Hard
Consider a 6-stage instruction pipeline, where all stages are perfectly balanced. Assume that there is no cycle-time overhead of pipelining. When an application is executing on this 6-stage pipeline, the speedup achieved with respect to non-pipelined execution if 25% of the instructions incur 2 pipeline stall cycles is
4
Explanation
Average CPI with stalls = 1 + 0.25×2 = 1.5. Non-pipelined execution takes 6 cycle-equivalents per instruction (one per stage). Speedup = 6/1.5 = 4.
Source: GATE CS 2014 (Session 1) (2014)
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