Project ForgeA RAM chip has a capacity of 1024 words of 8 bits each (1K × 8). The number of 2×4 decoders with enable line needed to construct a 16K × 16 RAM from 1K × 8 RAM is
- A4
- 5
- C6
- D7
Explanation
16K words needs 14 address bits; each 1K×8 chip uses 10 of those for its own internal word select, leaving 4 high-order bits to select among 16 chip-groups (each group pairs 2 chips of 8 bits to make 16-bit words). A 4-to-16 decoder can be built from 2-to-4 decoders (with enable) in a two-level tree: 1 top-level decoder (decoding the top 2 of the 4 bits) driving 4 second-level decoders (each enabled by one top-level output, decoding the remaining 2 bits) — 1 + 4 = 5 decoders total.
Source: GATE CS 2013 (2013)
This question is part of a 15-day revision cycle — sign in and Project Forge will bring it back the day before you'd forget it.