Common Data for this question (continued, same code segment as the previous question): What is the minimum number of registers needed in the instruction set architecture of the processor to compile this code segment without any spill to memory? Do not apply any optimization other than optimizing register allocation.
- A3
- 4
- C5
- D6
Explanation
Without reordering, tracing liveness in the given statement order: after 'e=c+a', the live set is {a,c,d,e} (4 variables — c is still needed for x=c*c, and both d and e are needed later in the else branch); right at 'x=c*c' the live set is still {a,d,e,x} (4 variables, c just died). This peak of 4 simultaneously-live variables (just before/at the branch condition) is the maximum reached anywhere in the code (the if-branch only needs {a}, the else-branch only needs {d,e} — both smaller), so 4 registers are the minimum needed to avoid any spill.
Source: GATE CS 2013 (2013)
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