Project ForgeSign up free
Computer Organization & Architecture
Memory Hierarchy & Floating Point
GATE 2010
Medium

A main memory unit with a capacity of 4 megabytes is built using 1M×1-bit DRAM chips. Each DRAM chip has 1K rows of cells with 1K cells in each row. The time taken for a single refresh operation is 100 nanoseconds. What is the time required to perform one refresh operation on all the cells (expressed as a coefficient × 2^10, in nanoseconds)?

102400 nanoseconds

Explanation

A refresh operation refreshes one entire ROW at a time, across all chips simultaneously (since they share row-address lines). Each chip has 1K=2¹⁰ rows, so 2¹⁰ refresh operations suffice for the whole memory unit regardless of chip count. Total time = 100 × 2¹⁰ = 102400 nanoseconds.

Source: GATE CS 2010 (2010)

This question is part of a 15-day revision cycle — sign in and Project Forge will bring it back the day before you'd forget it.

Start revising free